High-Speed & RF Mixed-SignalR&D
ScopeMini 200 Pocket Oscilloscope
1 GSa/s interleaved ADC, FPGA-based triggering and deep memory, packed onto an 8-layer controlled-impedance board with a USB-C host link.
Block diagram
Selected block
BNC Inputs
1 MΩ / 50 Ω
Connects to: Analog FE
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Specifications
| Bandwidth | 200 MHz (-3 dB) |
| Sample rate | 1 GSa/s |
| Resolution | 8-bit (12-bit HiRes) |
| Memory | 64 Mpts |
| Input | 1 MΩ / 50 Ω, ±40 V |
| Interface | USB-C 3.2 |
Engineering breakdown
- 01
Front end
Switched attenuators and a programmable-gain amplifier hold flat response to 200 MHz.
- 02
Clocking
Low-jitter PLL with < 1 ps RMS jitter keeps interleaving spurs below -55 dBc.
- 03
Digital
FPGA handles edge, pulse-width and serial-protocol triggers in hardware.
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